Northrop Grumman Sr. Principal FPGA or ASIC Design Engineer in Melbourne, Florida
At the heart of Defining Possible is our commitment to missions. In rapidly changing global security environments, Northrop Grumman brings informed insights and software-secure technology to enable strategic planning. We're looking for innovators who can help us keep building on our wide portfolio of secure, affordable, integrated, and multi-domain systems and technologies that fuel those missions. By joining in our shared mission, we'll support yours of expanding your personal network and developing skills, whether you are new to the field or an industry thought-leader. At Northrop Grumman, you'll have the resources, support, and team to do some of the best work of your career.
Northrop Grumman Mission Systems (NGMS) is a leading global provider of secure software-defined, hardware enabled mission systems. Our company is pioneering capabilities in a wide variety of sectors that keep our nation and our allies safe from Undersea to Space and Cyberspace.
Northrop Grumman Electronic Mission Systems Sector, Digital Technology Group, is seeking a Sr. Principal Digital Electronic Engineer to work on FPGA or ASIC Design across the full product life cycle process. In this capacity, you will utilize your working knowledge of digital signal processing and digital interfaces.
Basic Qualifications for Sr. Principal FPGA or ASIC Design Engineer:
BS in Electrical Engineering or comparable engineering discipline
9+ years of digital design engineering experience (7+ years with an MS, 4 years with a PhD)
Advanced knowledge of SystemVerilog, Verilog and/or VHDL
Extensive experience with requirements, design, implementation and test of FPGAs and/or ASICs
US Citizenship with the ability to obtain and maintain Secret Security Clearance
MS in Electrical Engineering or comparable engineering discipline
Experience with industry standard FPGA design implementation tools for IP integration, PnR, CDC
Experience with industry standard ASIC front-end design tools for synthesis, LEC, CDC
Experience with STA constraints generation and timing closure
Experience leading ASIC and/or FPGA designs
Knowledge of industry standard bus or I/O interfaces
Experience with SystemVerilog Assertions (SVA)
Experience with scripting languages (Bash, Perl, Python, Tcl, Makefile)
Knowledge of digital signal processing
Active Secret Clearance or higher
Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO/AA and Pay Transparency statement, please visit www.northropgrumman.com/EEO. U.S. Citizenship is required for most positions.
Job Category : Engineering